Homework #8

Objectives:

Materials to Get Started:

  1. Click HERE to download JLS. (Depending on your OS and web browser, you may need to Right click and "Save As")
    (By the way, JLS was created by Michigan Tech.'s Dave Poplawski. For more information, see the JLS webpage: http://www.cs.mtu.edu/~pop/jlsp/bin/JLS.html)
  2. Click HERE to download a JLS file for an RS-Latch built out of cross-coupled NOR gates. (Again, you may need to Right-Click and "Save As")
  3. You may want to start JLS and look at the on-line help and take a look at the Tutorials: for this assignment you'll need to know how to run simulations and modify existing circuits by adding gates and wires.
    4. After you've run JLS and gone through any tutorials that you'd like, get started on the homework.

The Assignment:

  1. Start JLS (it's a self-executing Jave Jar file. You should be able to run it by double clicking on it)
  2. Load the RSLatch.jls file provided
    (File → Open. Select the file which hopefully you've saved somewhere convenient)
    At this point you should see the circuit loaded into JLS and the screen should look like:


    There are a three major parts to the circuit:
    1. The circuit looks like:
      This has a few interesting parts.

      First the "inputs" to the gates are given a special symbol called an "input pin".
      Notice that the picture indicates the direction of information flow as well as giving the input a name.
      In the following case, the input is named "R" and it's an input (pointing into the wire/circuit):

      The "outputs" are also given an "output pin". Again, this provides a name and makes the direction of information flow (out of the circuit) clear:


      Both of these ideas will be used later when we use "abstraction" to create bigger circuits. We'll "abstract" the function of a circuit and put it in a box. To use the box we only need to understand the interface: the input pins and the output pins.
    2. The "Signal Generator":

      Alghough the Signal Generator doesn't appear to be connected to anything, it actually contains a description of when to turn on and off the inputs. You can see this description in one of two ways: either right click on the Signal Generator and select modify or use the short-cut by moving the mouse over the signal generator and hitting Ctrl-M. Either way you'll see a window with the following contents:
         R  1 for 10
    0 for 50
    1 for 50
    0 for 50
    0 for 50
    0 for 50
    0 for 50
    0 for 50
    0 for 50
    0 for 50
    1 for 50
    0 for 50
    0 for 50
    0
end

S   0 for 10
    0 for 50
    0 for 50
    0 for 50
    0 for 50
    0 for 50
    1 for 50
    0 for 50
    0 for 50
    0 for 50
    1 for 50
    0 for 50
    0 for 50
    0
end

Stopper
    0 for 600
    1 
end
      This is a simple description of the inputs to my system. Each input is described in its own section, which begins with the input's name followed by a set of commands to control it and finally an "end".
      So, the "R" signal is going to:
        1. 1 for 10 : turn on (1) for 10 units of time (units don't matter, but I'll assume nanoseconds).
          (it's on from 0ns until 10ns)
        2. 0 for 50 : turn off (0) for 50 units of time
          (it's off from 10ns until 10+50=60ns)
        3. 0 for 50 : turn off (0) for 50 units of time
          (it's still off from 60ns until 110ns)
        4. .. etc.
        5. 0 : turn off (0)
          (Stay at a 0 until the simulation is done, time ends, or the computer dies)
          NOTE: a easy error is leaving off this "final value", but it is essential.

      There is a similiar description for the S and "Stopper" inputs as well.

      Notice that the "Stopper" signal is off for 600ns, then turns on.
      The stopper isn't really part of the circuit, just a special way to tell JLS to end the simulation at 600ns.
    3. Notice that the "Stopper" is just connected to a special "STOP" gate:

      This stop gate (as well as the pause) can be a handy tool for debugging circuits you're testing.
  3. Turn on the "Simulator Window" via the menu: Simulator → Show Simulator Window.
    There's a horizontal control for making the Simulator window bigger - depending on how JLS looks, you may want to stretch it.
    Mine looked like:

  4. Now "run" the simulation by clicking the green "start" button.
    Notice that now the "simulation" window has updated to show some graphs of the inputs and outputs.
    You should see something like this:

    Move your mouse back and fourth over this window and you can see the "values" of each input and output at anyparticular time.
  5. Questions Part A:
    1. In the original RS-Latch simulation:
      1. What are the values or S, R, Q, and L at time 265?
        (Pay close attention to the order)
      2. What are the values of S, R, Q, and L at time 290?
      3. What has happened between these two times?
    2. Modify the signal generator to cause both R & S to BOTH turn on at t=460 and back off at t=510 and re-start the simulation.
      1. What are S, R, Q, and L at time 547?
      2. What are S, R, Q, and L at time 552?
      3. What has happened between these two times?
  6. Create a D-Latch from the RS-Latch:
    1. Go to File → New (Name your new circuit. I called mine DLatch. Creative huh?)
    2. "Import" the RS-Latch: File → Import and pick the RSLatch.jls.
      (It'll ask for a "subcircuit name", I chose RSLatch again)
    3. Create a proper D-Latch. Here are a few hints:
      • Hit "ctrl-W" to start adding a wire. Go to where you want the wire to begin and hit the mouse button to actually start it (like at a gate input or output).
      • If you want a wire to make a right angle, go to the place you want it to turn and hit the left mouse button
      • If you want to connect a wire to something (like a gate), move until the input or output connection glows green.
      • If you want a wire to "end" without connecting to anything hit the left mouse button (to create an ending point) and then the right mouse button.
      Here's what my D-Latch looked like. I suggest you try to follow the same basic style:


      *** Notice that my D, Clock, and Q are highlighted. That's because I've right-clicked on each and selected "Watch". This is essential to see the results of running the simulation.

    4. Create the following test signal:
      1. D is on for 10ns
      2. D alterentes between off and on for 50ns each. Repeat this cycle 9 times. (18 changes)
        (Start in the "off" and have a total of 9 "ons" and 9 "offs")
      3. Clock is on for 10ns
      4. Clock alternates between off and on for 175ns each. Repeat this cycle 3 times.
      5. Run for a total of 1200 time units
    5. Questions Part B:
      Carefully look at the result and print it to include with your home work.
      Note that JLS sometimes doesn't show then entire signal unless you "scale" is using the scale option on the right. In my case I scaled it to "2".
      Your printout should look something like this (NOTE: These are NOT the inputs I've asked you to use, just an example that shows the D, Clock, and Q from time=0 until time=1200):

Submission:

  1. Answers to questions in Part A:
    1. In the original simulation of the SR-Latch:
      1. What are the values or S, R, Q, and L at time 265?
        (Pay close attention to the order)
      2. What are the values of S, R, Q, and L at time 290?
      3. What has happened between these two times?
    2. Modify the signal generator to cause both R & S to BOTH turn on at t=460 and back off at t=510 and re-start the simulation.
      1. What are S, R, Q, and L at time 547?
      2. What are S, R, Q, and L at time 552?
      3. What has happened between these two times?
  2. Printout of D-Latch Timing under test signals from Part B